1. Field of the Invention
This invention relates to integrated circuit manufacturing and, for example, to forming openings into or through a material that exists above a semiconductor substrate.
2. Description of the Related Art
In the fabrication of semiconductor devices, numerous conductive device regions and layers are formed in or on a semiconductor substrate. The conductive regions and layers of the device are isolated from one another by a dielectric, such as silicon dioxide (xe2x80x9coxidexe2x80x9d). At several stages during fabrication, it is necessary to make openings in a material, such as a dielectric, to allow for contact to underlying regions or layers. Generally, an opening through a dielectric exposing a diffusion region within a semiconductor substrate or an opening through a dielectric layer between polycrystalline silicon (xe2x80x9cpolysiliconxe2x80x9d) and the first metal layer is called a xe2x80x9ccontact openingxe2x80x9d, while an opening in other dielectric layers, such as an opening through an interlevel dielectric layer (xe2x80x9cILDxe2x80x9d), is referred to as a xe2x80x9cviaxe2x80x9d. As used herein, an xe2x80x9copeningxe2x80x9d will be understood to refer to any type of opening through any type of material, such as a dielectric layer, regardless of the stage of processing, layer exposed, or function of the opening.
To form the openings in the dielectric layer, a patterning layer of photoresist is formed over the dielectric layer. Openings are formed in the photoresist corresponding to the regions of the dielectric layer where the dielectric layer openings are to be formed. The openings in the photoresist may be formed using, for example, photolithography patterning and etch techniques that are well known to those of ordinary skill in the art.
In most modem processes of forming openings in the dielectric layer, a dry etch is performed subsequent to patterning the photoresist, wherein the dielectric layer is exposed to a plasma, formed in a flow of one or more gases. Typically, one or more halocarbons and/or one or more other halogenated compounds are used as the etchant gas. For example, CF4, CHF3, C2F6, SF6, NF3, and other gases may be used as the etchant gas. Additionally, gases such as O2, Ar, N2, or He, for example, may be added to the gas flow. The particular gas mixture used will depend on, for example, the characteristics of the dielectric being etched, the stage of processing, the etch tool being used, and the desired etch characteristics, such as etch rate, wall slope, and anisotropy, among others.
Many of the etch characteristics are generally believed to be affected by a passivation material that may occur with the etch process. The passivation material may contain carbon, possibly derived from carbon within the etchant and/or from carbon-based compounds within or upon the material being etched. The carbon-containing residue may be a polymer. The carbon-containing residue may form concurrently with the dry etch. For this reason, the fluorine-to-carbon ratio (xe2x80x9cF/C ratioxe2x80x9d) in the plasma is considered an important determinant in the dry etch. For a more thorough discussion of dry etching, see S. Wolf and R. N. Tauber, Silicon Processing for the VLSI ERA, Volume 1, pp. 539-585 (Lattice Press, Sunset Beach, Calif.; 1986), incorporate herein by reference.
As the dimensions of integrated circuits have been reduced, problems with uniformity of lateral dimensions of the openings have increased. As used herein, xe2x80x9clateral dimensionxe2x80x9d refers to the dimension of an opening fabricated in a dielectric layer, typically as measured in a direction substantially parallel to an upper surface of a semiconductor substrate upon which the integrated circuit is formed. xe2x80x9cCritical dimensionxe2x80x9d as used in this application refers to the design value of the opening in the dielectric and, by extension, to the lateral size of an opening in the patterned photoresist above the dielectric layer site where the dielectric opening is to be formed. Critical dimensions are of interest since they can represent the smallest lateral dimension that can be formed on a topography using various techniques such as photolithography. A lateral dimension can be represented by an opening formed within a film, a structure formed upon a film or substrate, and/or a spacing between structures.
In general, lateral dimensions require close control to prevent deviation from the critical dimensions and to ensure optimal device performance. xe2x80x9cDimensional uniformityxe2x80x9d as used in this application refers to the correspondence between the design value of a critical dimension and the value of the corresponding lateral dimension obtained during fabrication. For example, a combination of CF4 and/or CHF3 may be used as etchant gases for performing a plasma etch through a patterned photoresist, and Ar, and N2 may be used as a carrier/inert gas in the plasma etch chamber. Such a combination typically provides good dimensional uniformity for openings formed through a dielectric (i.e., good correspondence between the design values and the values obtained during fabrication).
FIG. 1 depicts a portion of a semiconductor topography 90 including a conductive line 2 with a dielectric layer 4 formed over the conductive line. According to an embodiment, conductive line 2 may include a metal. According to an alternative embodiment, conductive line 2 may include doped polysilicon. Conductive line 2 may be spaced above a semiconductor substrate on a wafer (not shown) by intervening layers of dielectric, semiconductive and/or conductive material. Alternatively, dielectric layer 4 may be formed directly upon portions of the semiconductor substrate. Patterned photoresist 6 resides upon dielectric layer 4.
Openings 10, 20, and 30 may be formed in photoresist layer 6 using well-known photolithography techniques. Openings 10, 20, and 30 are preferably formed with predetermined lateral dimensions C1, C2, and C3, respectively. Opening 20 is shown to be near the center 3 of the wafer, while openings 10 and 30 are shown near the edges 1 of the wafer. According to an embodiment, the lateral dimensions may be substantially uniform and can be relatively small in sizexe2x80x94comparable to a critical dimension. Alternatively, the lateral dimensions C1, C2, and C3 may vary from each other.
Turning to FIG. 2, openings 12, 22, and 32, which may be of predetermined lateral dimension or of critical dimension, have been formed in dielectric layer 4 by exposure of the dielectric layer to plasma etch 8. As shown in FIG. 2, lateral dimensions x1, x2, and x3 of openings 12, 22, and 32, respectively, may vary. It is to be noted that features in FIGS. 1 and 2 are not drawn to scale, but are exaggerated in order to highlight, for example, potential differences between lateral dimensions x1, x2, and x3 of openings 12, 22, and 32.
It is thought that photoresist erosion may cause the lateral dimensions of openings formed in the underlying dielectric layers to vary from the design values of the critical dimensions. Photoresist erosion generally occurs more rapidly near the edges 1 of a wafer than at the center 3. It is thought that this is due to higher temperatures at the wafer edges. The higher temperatures might result from a higher concentration of plasma 8 being present proximate the wafer edges than proximate the wafer center, as shown by the density of the arrows depicting plasma 8 in FIG. 2. As the size of critical dimensions is reduced, the use of, for example, a CF4/CHF3/Ar/N2 etchant gas mixture may result in openings with unacceptable dimensional uniformity. That is, the variation xcex94Ci in the lateral dimension xi for the ith opening, where xcex94Ci=xixe2x80x94Ci and Ci is the critical dimension of the ith opening, may be considered unacceptable if |xcex94Ci| exceeds a critical variation (e.g., a percentage of the value of Ci specified by the operator).
It is therefore desirable that an alternative plasma etch chemistry and/or methodology be developed to improve critical dimension uniformity. Alternative etch chemistries and methodologies ideally should provide the desired etch characteristics without (i) requiring extensive redesign of the process or process tools, (ii) providing or causing unacceptable performance or process maintenance tradeoffs, or (iii) using costly and unproven equipment.
The problems outlined above are in large part solved by an embodiment of the present invention concerning a method for forming openings in a material across a wafer. Additionally, the openings themselves are dimensioned to be relatively uniform across the wafer. The method comprises etching the material with a combination of etchants. At least one of the etchants include a low C/F ratio additive of the formula CxHyFz, (where xxe2x89xa72, preferably 2xe2x89xa6xxe2x89xa66; where yxe2x89xa71, preferably 1xe2x89xa6yxe2x89xa62x; where zxe2x89xa72, preferably 2xe2x89xa6zxe2x89xa62x+1), such as 1,1,1,2-tetrafluoroethane (CH2Fxe2x80x94CF3), or a combination of CH2Fxe2x80x94CF3 and a cyclic (hydro)fluorocarbon. Such low C/F ratio additives may maintain the lateral dimension and/or area of openings across the wafer within a predetermined critical variation.
For purposes of this application, a (hydro)fluorocarbon is a compound that contains carbon and fluorine and that may optionally contain hydrogen. Many plasma etchers may produce higher temperatures at the edges of wafers than at the centers, possibly due to higher electric fields at the wafer edges or poor wafer cooling at the edges. Without being bound by theory, it is thought that the poor critical dimension uniformity seen using conventional etching processes comes from the wafer temperature non-uniformity. Increased plasma densities or concentrations near the wafer edges may give rise to higher temperatures proximate the wafer edges than proximate the wafer center. Normally, the higher the temperature, the higher the rate at which the plasma etches a material (e.g., photoresist and/or a dielectric layer). As such, the widths of openings formed in die close to the wafer edge are typically greater than the widths of openings at the wafer center.
The addition of CxHyFz, optionally with a cyclic (hydro)fluorocarbon, to the etchant gas is believed to result in generation of a polymer that preferentially deposits at areas where the wafer temperature is higher. Because the wafer edge may have a higher temperature, more carbon-containing residue and/or polymer may be formed at the edge of the wafer than at the center. The additional residue or polymer at the wafer edge is thought to protect the photoresist from erosion to compensate for the greater photoresist etch rate that may exist under certain conditions at the wafer edge. This additional residue may also be useful in preventing excess lateral etching of vertical surfaces in the openings, as the openings are formed. In addition to polymer on the photoresist, polymer can form on sidewalls of the openings as it is formed. The addition of CH2Fxe2x80x94CF3 or of CH2Fxe2x80x94CF3 plus a cyclic (hydro)fluorocarbon to the etchant gas preferably results in increased uniformity in the lateral dimensions of openings formed using such a plasma etch chemistry.
The etch chemistry described herein may be used to etch the entire opening. Alternatively, the new etch chemistry may be used in a first step of a two-step etch methodology. The new etch chemistry may be used to etch substantially though the dielectric layer. Before etching through the dielectric layer is completed, a second etch chemistry substantially free of CH2Fxe2x80x94CF3 and cyclic (hydro)fluorocarbons may be used for over-etching the dielectric layer. The second etch chemistry may be used to improve control of etch rate and to maintain the integrity of the interface between the dielectric layer and the underlying conductive materials.